Vacancy No. IPE 08-18

IPE 08-18 Internship, Bachelor- or Masterthesis: ASIC based electronic design for next generation USCT III

 

Job description

At KIT a novel imaging method, called 3DUSCT, is under development. In this method ultrasound signals are used (A-Scans, ultrasound pressure over time) to reconstruct 3D image volumes of the female breast for early breast cancer diagnosis. Hundrets of ultrasound transducer array systems (so called TAS) were designed and built. The transducers act as receiver or emitter and are positioned around a measurement container ( see Fig.1, centre in the patient bed). The used transducers have typically a centre frequency of 2.5 MHz and the USCT method uses therefore water as contact medium.

Motivation and challenges

For a next generation prototype, USCT III, a new TAS (transducer array system) design is underway. Part of the new design includes an ASIC which serves as TX/RX multiplexer and amplifier for TX and pre-amp for RX. The ASIC has a digital part, a LV part (3x receiving channel µV muxed to 9x) and a HV part (1x excitation channel muxed to 9x, up to 80Vpp). The PCB and electronic circuitry design surrounding the 2x ASIC required for USCT 3.x needs to be designed. Challenges are enormous signal dynamic between µV to 100V and broad bandwidth in the high frequency range (0.5 MHz to 6 MHz).

Work

The work includes the characterizing of the USCT ASIC prototypes, the already existing core of the future USCT 3.x electric circuitry. For instance, ASIC parametrization happens with digital interfaces (SPI, I2C), with a bridge µC (MSP430) which needs to be integrated in the design. The current discrete USCT 2.x design should be adapted and extended for ASIC prototype chip, the new demands regarding US transducer (load only ~pF, increased number working RX/TX) and other side constraints like medical regulation requirements (ISO 60601, CE), low-power requirement and EMV should be integrated. For the USCT 3.0 design PCB footprint considerations (only 4cm² space for PCB), temperature considerations (several integrated temp-sensors) are also of concern. State of the art simulation (SPICE based tools, temperature simulation) and circuit design tools (CADENCE etc) of the IPE should be utilized. A characterization and function setup should be created, prototypes fabricated and evaluated. Work documentation should be created, which ends in a final presentation and report for the Master thesis.

Tools: Electronic circuitry, IPE electronic laboratory equipment & software

Supervision: Klaus Schlote-Holubek (Analog design), Roberto Blanco (ASIC), Michael Zapf (transducer)

Personal qualification
  • Good electrical engineering knowledge is required
  • Knowledge about ASICS, amplifiers, multiplexer, ultrasound transducer, PCB, circuit design is beneficial
  • programming knowledge (C, Matlab) is helpful, engineering tools like SVN/GIT are required
Organizational unit

Institute for Data Processing and Electronics (IPE)

Starting date

on appointment

Contract duration 

3-6 months (Bachelor, Master or internship)

Contact person

Michael Zapf (IPE)                             michael.zapf@kit.edu,

Roberto Blanco (IPE)                         Roberto.blanco@kit.edu,

Klaus Schlote-Holubek (IPE)             Klaus.Schlote-holubek@kit.edu

Application

Please apply online using the button below for this vacancy number IPE 08-18.
Personnel support is provided by 

Ms Schaber
phone: +49 721 608-25184,

Hermann-von-Helmholtz-Platz 1, 76344 Eggenstein-Leopoldshafen, Germany

If qualified, handicapped applicants will be preferred.